Short bio

Graduate students

• Ph.D.
• Min Deng
• Yan Solihin (coadvising with Dr. Torrellas at the Univeristy of Illinois at Urbana-Champaign)
• Ji Zhang
• M.S.
• Xing Fang
• Kapila Moonesinghe

Teaching

• CSE 450 Translation of Programming Languages, Michigan State University, Spring 2002
• CSE 891 Advanced Program Analysis and Optimization Techniques, Michigan State University, Fall 2001
• CSE 822 Parallel Processing Computer Systems, Michigan State University, Spring 2001
• CSE 320 Computer Organization and Assembly Language Programming, Michigan State University, Fall 2000
• CSE 450 Translation of Programming Languages, Michigan State University, Spring 2000
• CS 231 Computer Architecture I, University of Illinois at Urbana-Champaign, Fall 1999
• CS 296 Honors Course in Computer Science, University of Illinois at Urbana-Champaign, Fall 1999

Professional Activities (Program Committee)

• ISPAN'02: The 6th International Symposium on Parallel Architectures, Algorithms, and Networks
• JVM'02: Java Virtual Machine Research and Technology Symposium

Contact Information

• Email: jlee@cse.msu.edu

• Office Address

  2138 Engineering Building
  Michigan State University
  East Lansing, MI 48824
  Phone: 517-432-9239
  Fax: 517-432-1061

 

• Home Address

  701 103 Cherry Lane
  East Lansing, MI 48823
  Phone: 517-355-7762

 

• Mailing Address

  Dept. of Computer Science & Engineering
  2138 Engineering Building
  Michigan State University
  East Lansing, MI 48824

Publications

   Journals

• Jaejin Lee, David A. Padua, and Samuel P. Midkiff. "Basic Compiler Algorithms for Explicitly Parallel Programs", Submitted for publication.
  
  
• Samuel P. Midkiff, Jaejin Lee, David A. Padua, "A Compiler for Multiple Memory Models", Accepted for publication in Concurrency: Practice and Exprerience.
  
  
• Yan Solihin, Jaejin Lee, and Josep Torrellas. "Automatic Code Mapping on an Intelligent Memory Architecture", IEEE Transactions on Computers: Special Issue on Advances in High Performance Memory Systems, Vol. 50, No 11, pp. 1248--1266, November 2001.



• Jaejin Lee and David A. Padua. "Hiding Relaxed Memory Consistency with a Compiler", IEEE Transactions on Computers: Special Issue on Parallel Architectures and Compilation Techniques, Vol. 50, No 8, pp. 824--833, August 2001.
  
  
• Jaejin Lee, Samuel P. Midkiff, and David A. Padua. "A constant propagation algorithm for explicitly parallel programs". International Journal of Parallel Programming, Vol. 26, No 5, pp. 563--589, 1998. ( pdf )
  
  
• William Blume, Ramon Doallo, Rudolf Eigenmann, John Grout, Jay Hoeflinger, Thomas Lawrence, Jaejin Lee, David Padua, Yunheung Paek, Bill Pottenger, Lawrence Rauchwerger, and Peng Tu. "Parallel programming with Polaris". IEEE Computer, Vol. 29, No 12, pp. 78--82, December 1996.

   Conferences

• Jaejin Lee and H. D. K. Moonesinghe. "Adaptively Increasing Performance and Scalability of Automatically Parallelized Programs", The 15th International Workshop on Languages and Compilers for Parallel Computing, College Park, Maryland, July 2002. ( pdf )
  
  
• Zehra Sura, Chi-Leung Wong, Xing Fang, Jaejin Lee, Samuel P. Midkiff, and David Padua. "Automatic Implementation of Programming Language Consistency Models", The 15th International Workshop on Languages and Compilers for Parallel Computing, College Park, Maryland, July 2002. ( pdf )
  
  
• Ji Zhang, Jaejin Lee, and Philip K. McKinley. "Optimizing the Java Pipe I/O Stream Library for Performance", The 15th International Workshop on Languages and Compilers for Parallel Computing, College Park, Maryland, July 2002. ( pdf )
  
  
• Chi-Leung Wong, Zehra Sura, Xing Fang, Samuel P. Midkiff, Jaejin Lee, and David Padua. "A Compiler Infrastructure for Memory Models", The 6th International Symposium on Parallel Architectures, Algorithms,and Networks (ISPAN'02), Manila, Philippines, May 2002. ( pdf )
  
  
• Yan Solihin, Jaejin Lee, and Josep Torrellas. "Using a User-Level Memory Thread for Correlation Prefetching", The 29th Annual International Symposium on Computer Architecture (ISCA 2002), Anchorage, Alaska, May 2002. ( pdf )
  
  
• Yan Solihin, Jaejin Lee, and Josep Torrellas. "Prefetching in an Intelligent Memory Architecture Using a Helper Thread", The 5th Workshop on Multithreaded Execution, Architecture and Compilation (MTEAC-5), December 2001.( pdf ) (Best paper award)
  
  
• Betty Cheng, Laura Dillon, Kurt Stirewalt, Philip McKinley, Sadeep Kulkarni, and Jaejin Lee. "Automated Development and Run-time Adaptation of Interactive Distributed Applications", NSF Workshop on New Visions for Software Design and Productivity: Research and Applications (Software Design and Productivity Coordinating Group) , December 2001. ( pdf )
  
  
• Samuel P. Midkiff, Jaejin Lee, David A. Padua "A Compiler for Multiple Memory Models", The 9th Workshop on Compilers for Parallel Computers (CPC 2001) , Edinburgh, Scotland, UK, June 2001 ( pdf )
  
  
• Jaejin Lee, Yan Solihin, and Josep Torrellas. "Automatically Mapping Code in an Intelligent Memory Architecture", The 7th International Symposium on High Performance Computer Architecture (HPCA-7), Monterrey, Mexico, January 2001. ( pdf )
  
  
• Yan Solihin, Jaejin Lee, and Josep Torrellas. "Adaptively Mapping Code in an Intelligent Memory Architecture", The 2nd Workshop on Intelligent Memory Systems (IMS 2000, in conjunction with ASPLOS-IX, Lecture Notes in Computer Science 2107, Springer-Verlag), Cambridge, Massachusetts, pp. 71--84, November 2000. ( pdf )
  
  
• Jaejin Lee and David A. Padua. "Hiding Relaxed Memory Consistency with Compilers". The IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT 2000), Philadelphia, Pensilvania, pp. 111--122, October 2000. ( pdf )
  
  
• Jaejin Lee, David A. Padua, and Samuel P. Midkiff. "Basic Compiler Algorithms for Parallel Programs". The 7th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 1999), May 1999. ( pdf )
  
  
• Jaejin Lee, Samuel P. Midkiff, and David A. Padua. "Concurrent static single assignment form and constant propagation for explicitly parallel programs". The 10th International Workshop on Languages and Compilers for Parallel Computing (LCPC,Lecture Notes in Computer Science 1366, Springer-Verlag), pp 114--130, Twin Cities, Minnesota, August 1997. ( pdf )
  
  
• Jaejin Lee and David A. Padua. "Parallel static single assignment form and constant propagation for explicitly parallel programs". The 2nd HPCA Workshop on Interaction between Compilers and Computer Architectures (INTERACT-2), San Antonio, Texas, February 1997. ( pdf )
  
  
• William Blume, Rudolf Eigenman, K. Faigin, John Grout, Thomas Lawrence, Jaejin Lee, Jay Hoeflinger, David Padua, Yunheung Paek, Paul Petersen, William Pottenger, Lawrence Rauchwerger, Stephen Weatherford, and Peng Tu. "Restructuring programs for high-speed computers with polaris". The 1996 ICPP Workshop on Challenges for Parallel Processing, August 1996 (pdf )
  
  
• Zohar Manna, Nikolaj Bjorner, Anca Browne, Edward Chang, Michael Colon, Luca de Alfaro, Harish Devarajan, Arjun Kapur, Jaejin Lee, Henny Sipma, and Tomas E. Uribe. "STeP: The Stanford Temporal Prover". TAPSOFT'95: Theory and Practice of Software Development (6th International Joint Conference CAAP/FASE, Lecture Notes in Computer Science 915, Springer-Verlag), pp. 793--794. May 1995. ( pdf )

   Ph.D. Thesis

• Jaejin Lee, Compilation techniques for explicitly parallel programs. Technical Report UIUCDCS-R-99-2112, Department of Computer Science, University of Illinois at Urbana-Champaign, October 1999. ( pdf )

   Technical reports

• Jaejin Lee and David A. Padua. "A Compiler Technique to Hide Relaxed Memory Consistency",Technical Report MSU-CSE-01-13, Department of Computer Science and Engineering, Michigan State University, April 2001.
  
  
• Jaejin Lee, David A. Padua, and Samuel P. Midkiff. "Basic Compilation Techniques for Explicitly Parallel Programs", Technical Report MSU-CSE-01-14, Department of Computer Science and Engineering, Michigan State University, April 2001.
  
  
• Jaejin Lee, "Hiding the Java Memory Model with Compilers", Technical Report MSU-CSE-00-29 (Presented in the OOPSLA workshop: Revising the Java Thread Specification), Department of Computer Science and Engineering, Michigan State University, December 2000.
  
  
• Jaejin Lee, Samuel P. Midkiff, and David A. Padua. "Concurrent Static Single Assignment Form and Concurrent Sparse Conditional Constant Propagation for Explicitly Parallel Programs". CSRD Technical Report TR#1525, University of Illinois at Urbana-Champaign, July 1997.
  
  
• William Blume, Rudolf Eigenman, K. Faigin, John Grout, Thomas Lawrence, Jaejin Lee, Jay Hoeflinger David Padua, Yunheung Paek, Paul Petersen, William Pottenger, Lawrence Rauchwerger, S. Weatherford, and Peng Tu. "Advanced program restructuring for high-performance computers with polaris". CSRD Technical Report TR#1473, University of Illinois at Urbana-Champaign, January 1996.

   Poster presentations

• Compilation Techniques for Parallel Programs. CASCON '98, IBM Centre for Advanced Studies Conference, Toronto, Canada, November, 1998
  
  
• Compilation Techniques of Explicitly Parallel Programs. CASCON '97, IBM Centre for Advanced Studies Conference, Toronto, Canada, November, 1997