Contact Information

Address: 3115, Dept. of Computer Science and Engineering, Michigan State University, East Lansing, MI 48823 USA.
Cell Phone: (+1) 517 896 9445


Ph.D. candidate in Computer Sceince and Engineering, 2010 - present
Michigan State University, MI, USA
Supervisor: Dr. Sandeep. Kulkarni
M.Sc. in Computer Engineering (Computer Architecture), 2006 - 2009
Sharif University of Technology, Tehran, Iran

Thesis: “Evaluation of mutual effect of Real-timeness on power consumption in Wireless Sensor Networks”

Supervisor: Dr. A. H. Jahangir
B.Sc. in Computer Engineering (Software), 2001 - 20006
University of Science and Technology, Tehran, Iran

Thesis: “Evaluation of NS2 simulator and implementing a sample network with it.”

Research Interests

Research Experiences

Software Engineering and Network Systems Lab (SENS Lab), Dept. of Computer Science and Engineering , Michigan State University
Research Assistant 2010 - present
  • Model Repair (Revision) Problem:

    Formal verification and, in particular, model checking has been in the center of research activities on formal methods in the past three decades. For a model of a system under inspection, a model checker either develops a proof of correctness or a counterexample. Normally, if the model checker returns a counterexample, the designer needs to fix the bug in the model and subsequently re-check the model to ensure its correctness. While this approach has been practiced extensively, it suffers from human involvement in the loop, namely, fixing the bug in the model. This involvement may consequently introduce new bugs to the model, hence, requiring another step of verification. Automated model repair aims at eliminating the human factor in fixing bugs.

  • Designing dependable software systems:

    The goal of this area of research is to extend the boundaries of automation in analysis and design of software systems, thereby increasing software dependability. We are interested in both theoretical and practical aspects of automating the development of dependable software systems.

Novel Computer Architecture and Communication Networks Lab (NCACN), Department of Computer Eng. , Sharif University of Technology
Research Assistant 2007-2009
  • Evaluated the mutual effect of Real-timeness on power consumption in Wireless Sensor Networks
  • Familiar with real-time systems in general and designing fault-tolerant protocol in wireless sensor networks.


1. Ali Ebnenasir, R. Hajisheykhi and Sandeep Kulkarni, "Facilitating the Design of Fault Tolerance in Transaction Level SystemC Programs", In the Proceedings of the 13th International Conference on Distributed Computing and Networking (ICDCN), pages 91-105, 2012.

2. M.Baharloo, R.Hajisheykhi, M.Arjomand, A.H.Jahangir, “An Analytical Performance Evaluation for WSNs Using Loop-Free Bellman Ford Protocol”, Accessed at: The IEEE 23rd International Conference on Advanced Information Networking and Applications (AINA-09).

3. A.Nasri, M.Fathy, R.Hajisheykhi, “A Cross Layered scheme for Broadcasting at Intersections in Vehicular Ad hoc Networks”, Accessed at: International Conference on Future Networks (ICFN 2009).

4. R.Hajisheykhi, M.Baharloo, K.Mizanian, A.H.Jahangir, “A Real-Time Infrastructure based on Topology Control for Wireless Sensor Networks”, Accessed at: Computer Society of Iran Computer Conference (CSICC 2009).

5. K.Mizanian,R. Hajisheykhi, M. Baharloo, A.H.Jahangir, “RACE: A Real-Time Scheduling Policy and Communication Architecture for Large-Scale Wireless Sensor Networks”, Accessed at: Communication Networks and Services Research Conference (CNSR 2009).

Technical Reports

1. R. Hajisheykhi “A Survey on Routing Protocols in Wireless Sensor Networks”, Prepared for Modelling and Analysis of Computer Networks Course, Feb. 2006 [in Persian]. This survey resulted in proposing a new Routing protocol.

Teaching Experiences

Instructor for Wireless Communications course,Iran University of Science and Technology (IUST), Behshahr branch, Fall 2009.

Instructor for Computer Nteworks course,Iran University of Science and Technology (IUST), Behshahr branch, Fall and Spring 2009.

Instructor for Computer Architecture course,Iran University of Science and Technology (IUST), Behshahr branch, Fall and Spring 2009.

Instructor for Digital Logic Circuit Lab.,Sharif University of Technology, Fall and Summer 2008.

Honors and Awards

Nominated project for Hawaii Project by Microsoft Research, 42nd ACM SIGCSE Technical Symposium on Computer Science Education, Dallas, Texas, March 2011

Nominated research proposal, to be appeared in DSN Student Forum, Boston, Massachusetts, June 2012


English: Fluent

Persian: Native


* available upon request