This section provides information about key EDA Standards Activity in the international arena. For more information, contact Ron Waxman (ronw@virginia.edu), TA for the U.S. TAG for IEC TC93, or Jean Lebrun (lebrun@sctf.thomson.fr), Chair of IEC TC93.
IEC TC93 is responsible for international standards in Electronic Design Automation. In this capacity, IEC TC93 coordinates with the EIA, IEEE, and ISO. The ISO coordination is accomplished via Joint Working Group 9 (IEC/ISO JWG9). TC93 has several working groups addressing: interoperability of EDA standards (WG1), hardware description languages, (WG2), interchange formats (WG3), packaging manufacturability issues (WG4), and conformance testing for applications using the EDA standards (WG5). These working groups have been established to bring existing EDA standards into the international arena, to ensure that the EDA standards can interoperate, to fill voids with new standards as appropriate, and to ensure that applications conform to the standards they utilize .
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VHDL IEEE 1076-1993
Shared variables, IEEE P1076a
Analog, IEEE P1076.1
Math Package, IEEE P1076.2
Synthesis, IEEE P1076.3
Timing, IEEE P1076.4
Utilities, IEEE 1076.5
Standard Multivalue Logic System for Model Interoperability,
IEEE 1164-1993
WAVES (Waveform and Vector Exchange Standard), IEEE 1029.1-1991
IEEE 1029.1-1991)
EIA 567A
EDIF 3.0.0
EDIF 4.0.0 (includes PCBs)
Application Protocol 210 (STEP)
CAD Frameworks Initiative
Japanese National Committee
Institute for Interconnecting and Packaging Electronic Circuits
Die Information Exchange (now under EIA)
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VHDL IEEE 1076-1993
IEEE and ANSI Standard
Generated by: IEEE CS DASC
Presently being balloted as a CDV - Vote completion scheduled
for February, 1995
Passage of the CDV will result in VHDL being a Draft
International Standard (DIS), for final vote by the IEC.
Shared variables, IEEE P1076a
Variables declared in a concurrent environment. Their value is
dependent on the order of execution of the processes reading and
writing the variables.
Extension of VHDL, in process
Generated by: IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Analog, IEEE P1076.1
Permits analog descriptions in a VHDL environment, provides
mixed mode simulation capability
Extension of VHDL, in process
Generated by: IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Math Package, IEEE P1076.2
Definition of a set of standard mathematical packages for VHDL
that include most often used real and complex elementary
functions. Examples are trigonometric, hyperbolic, and random
number generators.
Packages for VHDL, in process
Generated by: IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Synthesis, IEEE P1076.3
Will provide a standard language subset which will permit
synthesis of real hardware from the description.
Extension of VHDL, in process
Generated by: IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Timing, IEEE P1076.4 (Originally VITAL, VHDL Initiative Toward ASIC
Libraries)
Accelerate the development of tool independent sign-off quality
ASIC macrocell simulation libraries. Addresses timing, modeling
primitives, model interfaces, and model interoperability. Will
provide a standard method for representing and applying timing
data to VHDL designs.
Extension of VHDL, in process
Generated by: EDA industry, passed on to IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Utilities, IEEE 1076.5
Will provide packages that will be useful to the VHDL user
community. Packages relating to IEEE 1164, VHDL/Verilog
interoperability, test bench construction, and hardware
structures are being considered. Contribution and dialog via
e-mail is solicited (libutil-request@vhdl.org).
Extension of VHDL, in process
Generated by: IEEE CS DASC
To be considered as an IEC CDC in parallel with the IEEE
balloting process. Passage results in an IEC CDV action.
Standard Multivalue Logic System for Model Interoperability, IEEE
1164-1993
A standard datatype system for declaration of ports and signals,
used in modeling digital components in VHDL. Use results in
well-defined behavior among interconnected VHDL models.
Extension of VHDL
IEEE and ANSI standard, generated by IEEE CS DASC
To be proposed as a CDV by the U.S. TAG
WAVES (Waveform and Vector Exchange Standard),
IEEE 1029.1-1991
A standard test language that is VHDL compatible and is used to
apply test vectors to VHDL models.
Extension of VHDL
IEEE and ANSI standard
Generated by: IEEE CS DASC and IEEE SCC20 Needs to be updated
to conform to VHDL '93
EIA 567A (Hardware Component Modeling & Interface Standard.)
Defines concepts, terminology, and information required for
constructing a VHDL component model to be used in a hierarchical
design, based upon models using EIA 567A.
Extension of VHDL
EIA approved draft standard with one comment yet to be resolved
Generated by EIA
To be circulated as a CDC, expected soon
EIA 567A and VITAL must be considered concurrently to ensure
interoperability of timing descriptions
EDIF 3.0.0 (Electronic Design Interchange Format)
A standard layout and structural format for VLSI chips.
EIA and ANSI standard
Generated by EIA
To be balloted as a CDV, expected soon
EDIF PCB (EDIF Printed Circuit Board) (EDIF 4.0.0)
Addresses layout and connection description of printed circuit
board level designs
Extension of EDIF
EIA approved draft standard
Generated by EIA
To be circulated as a CDC, expected soon
EDIF PCB and AP210 must be considered concurrently to ensure
interoperability
AP210 (Application Protocol 210)
Addresses layout and connection description of board level
designs
A standard within the STEP family
STEP: Standard for the Exchange of Product Data
Being balloted by ISO, with cooperation of IEC
Generated by ISO TC184/SC4
EDIF PCB and AP210 must be considered concurrently to ensure
interoperability
CFI (CAD Frameworks Initiative)
Dedicated to EDA integration and interoperability of CAD tools.
Proposed standards relating to libraries and design
representation for electronic parts
Generated by CFI
CFI needs to initiate IEC activity via the U.S. TAG
Japanese National Committee
Component Libraries, proposed
Generated by Japanese standards organization
CFI has been working with the Japanese organization and concurs
with the Japanese proposal.
IPC
A suite of existing standards related to PCBs and wiring
Generated by the Institute for Interconnecting and Packaging
Electronic Circuits (IPC)
The IPC organization has been in existence for a couple
of decades. Their standards are in use by many companies. IEC
TC93 is considering the IPC standards, since there is an
international interest in them.
DIE (Die Information Exchange Format)
Generated by the DIE Industry Group- The Die Industry Group is a
new initiative in the U.S.
EIA has accepted the role of making DIE a standard.
EIA plans to issue a New Work Item Proposal (NP) to the IEC TC93
US TAG to start IEC action on DIE.
DIET (Die Information Exchange Format with Timing)
This activity must be coordinated with the timing work that is
being done for VHDL.
EIA has accepted the role of making DIET a standard.
EIA plans to issue a New Work Item Proposal (NP) to the IEC TC93
US TAG to start IEC action on DIET.
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ANSI American National Standards Institute (approves standards
created by IEEE, EIA and other U.S., ANSI sanctioned,
standards making bodies.)
CDC Committee Draft for Comment (The term used in the IEC when
circulating a draft standard to member countries of a
TC, for comment. The comments often lead to changes
in the draft standard.)
CDV Committee Draft for Vote (The term used in the IEC when
circulating a draft standard to member countries of a
TC, for vote. The CDV only permits voting, up or down,
without comment or changes proposed to the draft.)
CS Computer Society (a professional society within
the Institute of Electrical and Electronic Engineers.
Standards committees within the CS are approved by ANSI to
generate IEEE standards. The balloting constituency
is composed of individuals who vote as such, according to
IEEE rules.).
DASC Design Automation Standards Committee (a standards committee
within the Computer Society. Acts according to IEEE rules
in balloting on proposed IEEE standards. The balloting
constituency is composed of individuals who vote as such,
according to IEEE rules.)
DIS Draft International Standard (The term used in the IEC when a
CDV has passed and the standard is to be submitted to the
nations that are members of the appropriate TC for final
vote to become a fully approved IEC standard.)
EIA Electronic Industries Association (an association with U.S.
industry member companies. Each company gets one vote in
standards balloting within EIA).
IEC International Electrotechnical Commission (the
commission is composed of member nations. On all matters,
including standardization issues, each member nation of
a given technical committee gets one vote.)
IEEE Institute of Electrical and Electronic Engineers (IEEE has
standards making committees which are approved by ANSI
as such. The balloting constituency is composed of
individuals who vote as such, according to IEEE rules.)
IPC Institute for Interconnecting and Packaging Electronic Circuits
(The IPC organization has been in existence for a couple of
decades. Their standards, which deal with layout and
connection of printed circuit boards, are in use by many
companies. IEC TC933 is considering the IPC standards. There
is an international interest in the IPC standards.)
ISO International Standards Organization (similar to IEC, where each
member nation gets one vote on matters that come before the
various TCs. ISO generally deals with non-electrical
standards, while IEC deals with electrical and electronic
standards. There is some overlap, and a joint working group
has been established - JWG9 - to deal with such issues.)
NP New Work Item Proposal (The term used in the IEC for a
(NWIP) proposal for a new IEC standard.)
PAR Project Authorization Request (The term used in the IEEE for a
proposal for a new IEEE standard.)
TA Technical Advisor (the term used for the chair of the U.S.
Technical Advisory Group for a Technical Committee within the
IEC. The TA carries the vote of the U.S. to ANSI/USNC for
the USNC to vote for the U.S. in IEC matters.)
TC Technical Committee (the IEC establishes many TCs to address
various aspects of the electrical/electronic standards
arena. These TCs address such areas as libraries, fuses,
wiring harnesses, etc. TC93 is the IEC TC that addresses EDA
standards. Various working groups have been established to
address specific sub-areas. The chair of a TC may come from
any nation - must be approved by the nations national
committee and by the IEC - and must act as a neutral person
in all matters that come before the TC.)
USNC U.S. National Committee (a committee of ANSI that is responsible
to vote for the U.S in international standards bodies such
as ISO and IEC)
US TAG U.S. Technical Advisory Group (the ANSI approved committee,
within a particular discipline, that advises the TA on
the U.S. position to take on standards related matters.
The TA assesses the TAG member's opinions, forms his or
her own, and instructs the USNC as to
the vote for the U.S.)
WG Working Group (each TC has established various working
groups to address sub-areas within the TCs context. TC93
has five working groups at present. Working groups are
international in makeup - as contrasted to the U.S. TAG
which has U.S. membership only. The chair of a working
group can be from any nation, but must act as a neutral.
The national committee from each nation approves the
members of the working group from that nation.
The TC chair makes the final acceptance, but generally
the action is pro forma.)
WG1 Working Group 1 of TC93 addresses interoperability of EDA
standards.
WG2 Working Group 2 of TC93 addresses hardware description
languages (e.g. VHDL).
WG3 Working Group 3 of TC93 addresses interchange formats (e.g.
EDIF).
WG4 Working Group 4 of TC93 addresses printed circuit boards and
layout
WG5 Working Group 5 of TC93 addresses conformance of applications
to IEC EDA standards
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